The invention refers to a monolithically integrated read-only memory having a plurality of word lines, a plurality of read lines which cross the word lines to form intersections, and wherein the read lines are connected via load elements to a supply voltage. At the intersections, field effect transistors are connected to the read and word lines, the transistors being selectable via the word lines and functioning as coupling elements between the read lines and a circuit point carrying a reference potential.
Such a read-only memory (ROM) is known from the book by Luecke, Mize and Carr "Semiconductor Memory Design and Application", McGraw-Hill Publishing Company Kogakusha Ltd., Tokyo, 1973, pp 154-155, in particular FIG. 6.15, incorporated herein by reference. Here, however, field effect transistors serving as coupling elements are provided only at selected intersections and not at the remaining ones. The selection of the intersections or, respectively the programming of the read-only memory, thus requires a corresponding design of those masks which are used in the definition of the field effect transistors. In accordance with this, the programming takes place before the application of the metallizations.
On pages 168 and 169 of the above-identified publication, other programmable read-only memories are described whose coupling elements are connected in series with connection members which can be interrupted for programming in order to render the specific coupling elements ineffective. The connection members however considerably increase the surface requirements on the semiconductor.